NEC CORP. and four of its competitors in the memory business are working with INTEL CORP. to develop cost-effective, high-performance DRAM technology for the main memory of PCs scheduled for release in 2003 and later. Industry analysts are quick to point out that Intel's willingness to heed the decision of the group represents an about-face for the supplier of about 80 percent of all processors. For current-genera-tion mainstream PCs, Intel unilaterally decided that RAMBUS INC.'s direct Rambus DRAM would be the main memory. As a result, memory manufacturers have not devoted the resources, whether technical or financial, to supporting and advancing RDRAM technology that presumably would have been forthcoming had the decision to go the Rambus route been mutual. Interestingly, RDRAM is one of the candidates for the main memory of next-generation PCs along with synchronous DRAM and DDR (double data rate) SDRAM. A completely new technology is another possibility.
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD., TOSHIBA CORP. and SANDISK CORP., which are collaborating on a next-generation secure memory card (see Japan-U.S. Business Report No. 360, September 1999, p. 8), have organized an industry association to set standards for the SD (secure digital) Memory Card and to promote the development of digital audio-visual products and digital information appliances that use it. The postage stamp-size card will provide a high level of copyright protection compliant with the Secure Digital Music Initiative as well as high-density memory capacity. A who's who of electronics companies on both sides of the Pacific has said that they will join the SD Association. Sampling of the SD Memory Card is expected to begin in the first quarter of 2000, with production shipments following in the spring. The initial card will be available in capacities of 32 MB and 64 MB.
One of the pioneers in the development of chip solutions for the radio frequency-enabled wireless communications technology known as Bluetooth completed a $35 million third round of financing. TDK CORP. was one of the new investors in SILICON WAVE, INC. It joined existing investor JAPAN ASIA INVESTMENT CO., LTD. The San Diego, California company, which already has announced a Bluetooth-targeted system-on-a-chip that integrates all radio, modem and synthesizer functions into a package smaller than a dime, is working with both TAIYO YUDEN CO., LTD. and HITACHI, LTD. (see Japan- U.S. Business Report No. 362, November 1999, p. 11).
DAI NIPPON PRINTING CO., LTD. the world leader in photomasks, the plates used to project ever more complex circuit design patterns onto silicon wafers has a project underway with INTEL CORP. to develop the photomask technologies that the processor king will require to implement its next-generation 0.13-micron design rule. Intel currently is transitioning all of its mainstream processor products to 0.18-micron processing. It plans to switch to 0.13-micron technology in 2001. Significantly, Dai Nippon Printing will make the 0.13-micron process photomask technologies it codevelops with Intel available to other semiconductor manufacturers. Last June, the company acquired HITACHI, LTD.'s photomask operations. In December, Dai Nippon Printing and TOSHIBA CORP. announced a joint venture to produce photomasks to realize the chipmaker's 0.15-micron process technology.
In a key win for AERA CORP., big semiconductor production equipment manufacturer NOVELLUS SYSTEMS INC. made the Austin, Texas company's gas mass-flow controllers the standard MFC for its entire product line. San Jose, California-based Novellus produces thin-film deposition equipment, including dielectric plasma chemical vapor deposition systems and high-density plasma, tungsten and physical vapor systems. Aera, a NIPPON TYLAN CORP. firm, has been turning out MFCs since 1994.
In advance of the widespread availability of such next-generation PC main memory candidates as DDR SDRAM, the Santa Clara, California subsidiary of world automatic test equipment leader ADVANTEST CORP. released the T5585 Memory Test System and the companion M6541A Dynamic Test Handler. The tester, which starts at $3 million, can handle up to 128 devices in parallel at either 250 MHz or 500 MHz, making it ideal for the expected big volume of forthcoming high-bandwidth devices. The $475,000 handler is designed to maximize throughput and to reduce testing costs.
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